Design and realization of 1024-point high-speed FFT processor based on FPGA
10.3760/cma.j.issn.1673-4181.2011.04.004
- VernacularTitle:1024点高速FFT处理器的FPGA设计与实现
- Author:
Wenfang WANG
;
Sheng ZHOU
;
Xiaochun WANG
;
Liwei WANG
;
Jianjun JI
;
Jun YANG
;
Yanqun WANG
- Publication Type:Journal Article
- Keywords:
Field programmable gate array;
1 024-point FFT;
Butterfly;
Ping-pong operation
- From:
International Journal of Biomedical Engineering
2011;34(4):205-208
- CountryChina
- Language:Chinese
-
Abstract:
ObjectiveTo design a fast fourier transform (FFT) processor to meet the needs for high-speed and real-time signal processing. MethodsA 1 024-point, 32-bit, fixed, complex FFT processor was designed based on field programmable gate array (FPGA) by using radix-2 decimation in frequency(DIF) algorithm and pipeline structure in the butterfly module and ping-pong operation in data storage unit. ResultsWhen the primary clock was 100 MHz, 1 024-point FFT calculation took about 62.95us. The processor was fast enough for processing highspeed and real-time signals. ConclusionThe results provides reference value that theoretical study of the FFT algorithm can be applied in the adaptive dynamic filter of ultrasonic diagnostic system and ultrasonic doppler flow measurement system.
